Integrated circuit chips having a two-dimensional array of pads (e.g., input/output pads) thereon may be electrically connected to printed circuit boards using conventional flip-chip bonding techniques. These bonding techniques may employ solder bumps (a/k/a “solder balls” or “solder bonds”) connected to each of a plurality of the pads in the two-dimensional array. However, flip-chip bonding techniques are not suitable for all chip-to-board interconnect applications. For example, wire bonding techniques may be used to electrically interconnect printed circuit boards to integrated circuit chips having contact pads thereon that are closely arranged along a periphery (e.g., sides) or other contact region therein. But, as the degree of integration increases within integrated circuit chips, the spacing between adjacent contact pads may decrease as the number of contact pads increases to support the higher integration. Unfortunately, the reduced spacing between adjacent contact pads may result in an unacceptable increase in device failure caused by electrical shorting between adjacent wire bonds contacting adjacent contact pads. To address this potential reduction in device reliability, wire bonds of different length may be used to contact pads having a greater spacing therebetween. However, the use of wire bonds of different length may cause a deterioration in the electrical characteristics of the chip by causing, among other things, non-uniform signal delay between pads generating and receiving synchronized data and signals.